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20.2. Command-Line Syntax

make  [options]  [targets]  [macro definitions]

Options, targets, and macro definitions can appear in any order. Macro definitions are typed as:

name=string

If no makefile or Makefile exists, make will attempt to extract the most recent version of one from an SCCS file, if one exists. (Some versions also know about RCS.)

20.2.1. Options

-e
Environment variables override any macros defined in description files.

-f file
Use file as the description file; a filename of - denotes standard input. -f can be used more than once to concatenate multiple description files. With no -f option, make first looks for a file named makefile, and then one named Makefile.

-i
Ignore error codes from commands (same as .IGNORE).

-k
Abandon the current target when it fails, but keep working with unrelated targets.

-n
Print commands but don't execute (used for testing). -n prints commands even if they begin with @ in the description file.

Lines that begin with $(MAKE) are an exception. Such lines are executed. However, since the -n is passed to the subsequent make in the MAKEFLAGS environment variable, that make also just prints the commands it executes. This allows you to test out all the makefile files in a whole software hierarchy without actually doing anything.

-p
Print macro definitions, suffixes, and target descriptions.

-q
Query; return 0 if file is up to date; nonzero otherwise.

-r
Do not use the default rules.

-s
Do not display command lines (same as .SILENT).

-t
Touch the target files, causing them to be updated.



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